Move aligned cache line constant to commun header.
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@@ -70,15 +70,6 @@ typedef enum {
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/********************************** INTERNAL ************************************/
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/* Define the exclusion size so that 2 atomic variables can be in
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separate cache line. This prevents false sharing to occur within the
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CPU cache. */
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#if defined(_M_X64) || defined(_M_AMD64) || defined(__x86_64__)
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# define BUFFERI_ALIGN_FOR_CACHELINE_EXCLUSION 128
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#else
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# define BUFFERI_ALIGN_FOR_CACHELINE_EXCLUSION 64
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#endif
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#define BUFFERI_IF_CTE_SIZE(m_size) M_IF(M_BOOL(m_size))
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#define BUFFERI_SIZE(m_size) BUFFERI_IF_CTE_SIZE(m_size) (m_size, v->size)
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@@ -425,14 +416,14 @@ M_C(name, _init)(buffer_t v, size_t size) \
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typedef struct M_C(name, _el_s) { \
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atomic_ullong seq; /* Can only increase. */ \
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type x; \
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char align[BUFFERI_ALIGN_FOR_CACHELINE_EXCLUSION > sizeof(atomic_ullong)+sizeof(type) ? BUFFERI_ALIGN_FOR_CACHELINE_EXCLUSION - sizeof(atomic_ullong)-sizeof(type) : 1]; \
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char align[M_ALIGN_FOR_CACHELINE_EXCLUSION > sizeof(atomic_ullong)+sizeof(type) ? M_ALIGN_FOR_CACHELINE_EXCLUSION - sizeof(atomic_ullong)-sizeof(type) : 1]; \
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} M_C(name, _el_t); \
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\
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typedef struct M_C(name, _s) { \
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atomic_ullong ProdIdx; /* Can only increase */ \
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char align1[BUFFERI_ALIGN_FOR_CACHELINE_EXCLUSION]; \
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char align1[M_ALIGN_FOR_CACHELINE_EXCLUSION]; \
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atomic_ullong ConsoIdx; /* can only increase */ \
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char align2[BUFFERI_ALIGN_FOR_CACHELINE_EXCLUSION]; \
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char align2[M_ALIGN_FOR_CACHELINE_EXCLUSION]; \
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M_C(name, _el_t) *Tab; \
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unsigned int size; \
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} buffer_t[1]; \
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@@ -62,6 +62,14 @@
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# define M_UNLIKELY(cond) (cond)
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#endif
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/* Define the exclusion size so that 2 atomic variables can be in
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separate cache line. This prevents false sharing to occur within the
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CPU cache. */
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#if defined(_M_X64) || defined(_M_AMD64) || defined(__x86_64__)
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# define M_ALIGN_FOR_CACHELINE_EXCLUSION 128
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#else
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# define M_ALIGN_FOR_CACHELINE_EXCLUSION 64
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#endif
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/***************************************************************/
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/****************** Preprocessing Times Macro ******************/
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